1. Field of the Invention
The present invention relates to a discrete semiconductor device having a single unit of a power insulated-gate type field effect transistor ("power MOSFET") or a semiconductor device such as a MOS integrated circuit (IC) in which a power MOSFET is formed, and a process of fabricating these semiconductor devices, and more particularly to a structure of a vertical normally-on-type power MOSFET with a trench structure having a channel region adjoining a side wall of a U-cross sectional trench and a process of fabricating the vertical normally-on-type power MOSFET.
2. Description of the Related Art
With a development of fine processing techniques, the on-state resistance of power MOSFETs has been decreased more and more. At present, trench-structure vertical power MOSFETs having a smaller cell size than a planar-structure diffusion self alignment (DSA) type device have been developed.
In the field of planar-structure power MOSFETs, a method for achieving a depletion mode (normally-on type) has been proposed, wherein a surface of a substrate is subjected to double diffusion to form a base region and a source region, following which a channel, ion implantation is effected. According to this method, double diffusion of a base and a source is performed by solid-phase diffusion from a polysilicon containing impurities, the polysilicon is removed, and a channel ion implantation is performed. Thereafter, a polysilicon gate electrode must be formed once again. Consequently, the number of steps of a photo engraving process (PEP) is large, and an alignment error may occur between a polysilicon gate electrode and a channel region.
On the other hand, in the field of vertical power MOSFETs, a normally-off-type device has been realized but a normally-on-type device has not. In a possible method of fabricating a normally-on-type vertical power MOSFET, ions are implanted at an obtuse angle to a wall region (channel region) exposed from a trench after the trench is formed in a process of fabricating a normally-off-type vertical power MOSFET, thereby achieving depletion.
However, at this time, ion-implanted particles are scattered in a multiple manner on the inner surface of the trench, and an unnecessary diffusion layer is formed on a portion of the substrate corresponding to the bottom of the trench. As a result, for example, a leakage current may flow, and characteristics are degraded.
As has been described above, in the prior art, it is difficult to fabricate a normally-on-type vertical power MOSFET.